Memory device distributed controller system
AssigneeMicron Technology, Inc.
InventorsLuca De Santis, Luigi Pilolli
Life of this patent
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Abstract
A memory device distributed controller circuit distributes memory control functions amongst a plurality of memory controllers. A master controller receives an interpreted command and activates the appropriate slave controllers depending on the command. The slave controllers can include a data cache controller that is coupled to and controls the data cache and an analog controller that is coupled to and controls the analog voltage generation circuit. The respective controllers have appropriate software/firmware instructions that determine the response the respective controllers take in response to the received command.
Claims15
A method of operation of a distributed controller system in a non-volatile memory device having a memory array comprising a plurality of memory cells, the method comprising:
- receiving a write command at a master controller of the non-volatile memory device, wherein the master controller is one controller of a plurality of controllers of the non-volatile memory device;
- determining at the master controller which of the remaining controllers of the plurality of controllers are to be activated in response to the received write command;
- in response to determining at the master controller to activate a data cache controller of the plurality of controllers, transmitting the received write command from the master controller to the data cache controller;
- in response to the write command received by the data cache controller, generating, by the data cache controller, all necessary signals to cause the data cache to accept data from a data input and to present the data to the memory array;
- in response to determining at the master controller to activate an analog controller of the plurality of controllers, transmitting the received write command from the master controller to the analog controller;
- in response to the write command received by the analog controller, determining, by the analog controller, programming voltages for programming the presented data to the memory array;
- and generating the programming voltages at an analog voltage generation circuit in response to signals generated by the analog controller in response to the write command received by the analog controller;
- wherein the master controller, the data cache controller, and the analog controller each comprise a read only instruction memory for storing instructions, an instruction decoder for decoding instructions from the instruction memory, and a logic unit for performing operations in response to decoded instructions;
- and
- wherein the read only instruction memory stores instructions that determine timing of control signals and types of control signals that are generated to control portions of the memory array.
A method for operating a distributed controller system, comprising a plurality of controllers, in a non-volatile memory device, the method comprising:
- receiving a command;
- interpreting the command to determine a command type;
- determining at a master controller of the plurality of controllers which of the remaining controllers of the plurality of controllers are to be activated in response to the command type;
- transmitting, from the master controller of the plurality of controllers, an indication of the received command type to each of the controllers of the plurality of controllers that are determined to be activated in response to the command type;
- and
- generating, at each of the controllers of the plurality of controllers that are to be activated in response to the command type, control signals to control respective portions of the non-volatile memory device for access of a memory array of the non-volatile memory device in response to the received indication of the received command type;
- wherein each of the plurality of controllers comprises a read only instruction memory for storing instructions, an instruction decoder for decoding instructions from the instruction memory, and a logic unit for performing operations in response to decoded instructions;
- and
- wherein the read only instruction memory stores instructions that determine timing of control signals and types of control signals that are generated to control portions of the non-volatile memory device.
Dependencies are inferred from the claim text.