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US 9,317,451 B2Granted
Nonvolatile semiconductor storage device having encrypting arithmetic device
AssigneeKabushiki Kaisha Toshiba
InventorsToshihiro Suzuki, Noboru Shibata, Hideo Shimizu
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Abstract
According to one embodiment, a nonvolatile semiconductor storage device includes an encrypting circuit for operating in a predetermined encrypting system, a memory cell array preliminarily storing complementary data to be used in the operation, and a page buffer having a first region for storing the data being read out from the memory cell array, and a second region used when executing the operation.
Claims17
A nonvolatile semiconductor storage device comprising:
- an encrypting circuit to execute an operation of a predetermined encrypting system,
- a memory cell array preliminarily storing complementary data to be used in the operation,
- a page buffer comprising a first region for storing the data being read out from the memory cell array, and a second region used at the time of execution of the operation,
- a register to store the data from the first region, and supplying the stored data into the second region,
- an inspection circuit to judge presence or absence of error in the data when storing the data into the register, and store the data into the register when the data is judged to be free from error,
- a control circuit to control reading out of the data from the memory cell array into the first region, and reading out of the data from the first region into the second region, and
- an address control circuit to designate an address of the page buffer or the memory cell array, based on a signal supplied from the control circuit,
- wherein the control circuit controls the address control circuit, and supplies the data from the first region into the second region, and
- when the inspection circuit detects an error in the data, it is notified to the address control circuit, and
- the address control circuit receives the notice, and designates other address in which data of same contents as the data in the page buffer is stored, and thereby
- the inspection circuit judges presence or absence of error in the data in the other address.
8 more elements
A nonvolatile semiconductor storage device comprising:
- an encrypting circuit to execute an operation of a predetermined encrypting system,
- a memory cell array preliminarily storing data to be used in the operation, the memory cell array including memory cells, bit lines, and word lines, the word lines being each connected to gates of the memory cells, the bit lines being each connected to one end of a corresponding one of the memory cells,
- a page buffer comprising a first region to store the data being read out from the memory cell array, and a second region used at the time of execution of the operation, the page buffer including buffer circuits corresponding to the bit lines, and
- a register to store the data from the first region, and supply the stored data into the second region,
- wherein the nonvolatile semiconductor storage device is a NAND flash memory device.
2 more elements
Dependencies are inferred from the claim text.