Security protection for memory content of processor main memory

A memory device, comprising:

• a memory array of a main memory, wherein the main memory is directly addressable by a processor without using an input/output (I/O) device;
• and
• a memory controller configured to:
• receive a memory write command from the processor for writing to a location within the memory array;
• provide a cryptographic key in response to receiving the memory write command, wherein the memo array comprises a persistent memory and wherein the cryptographic key is stored in the persistent memory;
• perform a cryptographic calculation using the cryptographic key for authenticating the write command;
• store a result of the cryptographic calculation in the persistent memory;
• and
• authenticate a subsequent write command for writing to the location using the stored result.

A system, comprising:

• a memory array of a main memory, wherein the main memory is directly addressable by a processor without using an input/output (I/O) device;
• a memory controller configured to:
• receive a memory write command from the processor for writing to a location within the memory array;
• provide a cryptographic key in response to receiving the memory write command, wherein the memo array comprises a persistent memory and wherein the cryptographic key is stored in the persistent memory;
• perform a cryptographic calculation using the cryptographic key for authenticating the write command;
• store a result of the cryptographic calculation in the persistent memory;
• and
• authenticate a subsequent write command for writing to the location using the stored result;
• and
• a processor for providing the write command for writing to the location within the memory array.