Methods and apparatus related to data processors and caches incorporated in data processors
AssigneeAdvanced Micro Devices, Inc.
InventorsZhe Wang, Xie Yuan, Junli Gu, Yi Xu, ShuChang Shan, Shuai Mu, Ting Cao
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AssigneeAdvanced Micro Devices, Inc.
InventorsZhe Wang, Xie Yuan, Junli Gu, Yi Xu, ShuChang Shan, Shuai Mu, Ting Cao
Estimating the term…
A cache includes a cache array and a cache controller. The cache array has a multiple number of entries. The cache controller is coupled to the cache array, for storing new entries in the cache array in response to accesses by a data processor, and evicts entries from the cache array according to a cache replacement policy. The cache controller includes a frequent writes predictor for storing frequency information indicating a write back frequency for the multiple number of entries. The cache controller selects a candidate entry for eviction based on both recency information and the frequency information.
A cache comprising:
A cache comprising:
A method of selecting a candidate entry of a cache array having a plurality of entries for eviction comprising:
Dependencies are inferred from the claim text.