Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments

A method for managing branch instructions in an emulation environment that is executing a program, the method comprising:

• populating a plurality of slots in a Polymorphic Inline Cache, each of the slots comprising a target address of a branch instruction of the program and a memory address of a compiled instruction representing the branch instruction;
• populating a plurality of entries in a branch target buffer residing within an emulated environment in which the program is executing, each of entries comprising an instruction address and a target address of a branch instruction of the program;
• and
• based on an indirect branch instruction associated with the program being encountered:
• identifying, from the indirect branch instruction, a target address associated with the indirect branch instruction;
• comparing, by a processor, at least one address in each of the slots of the Polymorphic Inline Cache to the target address associated with the indirect branch instruction;
• and
• based on none of the addresses in the slots of the Polymorphic Inline Cache matching the target address associated with the indirect branch instruction, searching in the branch target buffer to identify one of the entries in the branch target buffer that is associated with the target address of the indirect branch instruction.