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US 9,317,291 B2Granted
Local instruction loop buffer utilizing execution unit register file
AssigneeInternational Business Machines Corporation
InventorsAdam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
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Abstract
A method and circuit arrangement utilize a register file of an execution unit as a local instruction loop buffer to enable suitable algorithms, such as DSP algorithms, to be fetched and executed directly within the execution unit, and often enabling other logic circuits utilized for other, general purpose workloads to either be powered down or freed up to handle other workloads.
Claims8
A method of executing instructions in a processing unit of the type including an execution unit including a register file, the method comprising:
- fetching a first plurality of instructions from an instruction stream;
- in response to at least one instruction from the instruction stream, causing the execution unit to manipulate operand data stored in the register file;
- in response to at least one instruction from the instruction stream, loading a second plurality of instructions into the register file of the execution unit to utilize at least a portion of the register file as a local instruction loop buffer;
- fetching the second plurality of instructions from the register file;
- and
- causing the execution unit to execute the second plurality of instructions fetched from the register file;
- wherein the processing unit further comprises instruction decode logic and selection logic configured to pass instructions to the instruction decode logic, the selection logic including at least first and second inputs, the first input configured to receive instructions from an instruction cache and the second input configured to receive instructions from the register file, and wherein the method further comprises switching the selection logic to the second input prior to fetching the second plurality of instructions.
4 more elements
Dependencies are inferred from the claim text.