Expressing parallel execution relationships in a sequential programming language

An integrated circuit comprising:

• a processing circuit capable of executing at least a first and a second process;
• a first counter configured to track a number of times the first process has been executed on the processing circuit;
• a second counter configured to track a number of times the second process has been executed on the processing circuit;
• and
• a memory interface circuit to receive a plurality of instructions from a command buffer in a memory,
• wherein one of the plurality of instructions prevent execution of a third process until the first counter reaches a first number and the second counter reaches a second number, and
• wherein the plurality of instructions are compatible with a sequential programming language.

A method of processing data comprising:

• receiving a first command to execute a first process a first number of times on a processing circuit;
• receiving a second command to execute a second process a second number of times on the processing circuit;
• tracking a number of times the first process has been executed on the processing circuit;
• tracking a number of times the second process has been executed on the processing circuit;
• determining that the first process has been executed the first number of times on the processing circuit;
• determining that the second process has been executed the second number of times on the processing circuit;
• receiving a third command to execute, after the first process has been executed the first number of times and the second process has been executed the second number of times, a third process a third number of times on the processing circuit;
• and then
• receiving one or more additional commands to use data generated by the third process to generate display data and to display the display data,
• wherein the first, second, and third commands are compatible with a sequential programming language.