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US 9,317,287 B2Granted
Multiprocessor system
AssigneePanasonic Intellectual Property Management Co., Ltd.
InventorHiroyuki Morishita
Life of this patent
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AssigneePanasonic Intellectual Property Management Co., Ltd.
InventorHiroyuki Morishita
Estimating the term…
To provide a multi-processor system that efficiently debugs operations of one processor and operations of another processor. The multiprocessor system has a first processor and a second processor that executes processing by receiving notification from the first processor. The first processor: sequentially specifies instructions to be executed from an instruction queue; sends a notification based on a processing request instruction to the second processor when an instruction that is specified is the processing request instruction; executes the instruction that is specified when the instruction that is specified is not the processing request instruction; and determines whether or not a debug mode is set. When the first processor determines that the debug mode is set, the first processor stops specifying instructions after specifying the processing request instruction, and, after sending the notification, resumes specifying instructions after detecting that the second processor has completed processing corresponding to the notification.
A multiprocessor system comprising a first processor and a second processor that executes processing by receiving a notification from the first processor, wherein
A method used by a multiprocessor system including a first processor and a second processor that executes processing by receiving a notification from the first processor, the first processor including a determination unit, a specification unit, an execution unit, and a detection unit, the method comprising:
Dependencies are inferred from the claim text.