Floating point multiply-add unit with denormal number support

A non-transitory computer readable media including instructions that when executed can configure a manufacturing process used to manufacture a semiconductor device comprising a floating point multiply-add unit (FMAC) configurable to add a product of first and second operands to a third operand, wherein the FMAC comprises:

• a hardware minimum exponent determination module to determine a minimum exponent shift for a sum of the product and the third operand by subtracting a minimum normal exponent from a product exponent of the product;
• and
• a hardware left shift module to cause bits representing the sum to be left shifted by the minimum exponent shift if a third exponent of the third operand is less than or equal to the product exponent and the minimum exponent shift is less than or equal to a predicted left shift for the sum.