Package substrate

A package substrate comprising:

• a main package including:
• a main package body including first and second principal surfaces that are opposed to each other;
• a plurality of first bonding materials provided on the second principal surface of the main package body;
• and
• an internal circuit provided within the main package body and electrically connected to at least one of the plurality of first bonding materials;
• and
• a sub-package located on the second principal surface of the main package, the sub-package including:
• a sub-package body made of an insulating material and including first and second principal surfaces that are opposed to each other;
• and
• a plurality of independent ceramic electronic component chips embedded in the sub-package body;
• wherein
• a thickness direction dimension that is a dimension from the second principal surface of the main package to a portion of the sub-package that is most distant from the second principal surface of the main package, is substantially equal to or less than a thickness direction dimension of the first bonding materials;
• the first principal surface of the sub-package is arranged closer to the main package than the second principal surface of the sub-package body;
• the plurality of independent ceramic electronic component chips embedded in the sub-package body are arranged in a direction parallel or substantially parallel to at least one of the first and second principal surfaces of the sub-package body;
• the sub-package is surrounded by the plurality of first bonding materials;
• the sub-package includes a pad conductor on the first principal surface of the sub-package;
• and
• a dimension of the pad conductor is smaller than a dimension of each of the plurality of first bonding materials in a direction parallel to the second principal surface of the main package.