Multi-channel transceiver

A multi-channel transceiver, comprising:

• a phase-locked loop circuit for generating a first clock signal set and a second clock signal set, wherein the first clock signal set and the second clock signal set have different frequencies;
• a first transmitting channel comprising a first phase adjusting circuit and a first transmitter, wherein the first phase adjusting circuit receives the first clock signal set and generates a first spread spectrum clock signal with a first spread spectrum clock generator profile, wherein according to the first spread spectrum clock signal, the first transmitter generates a first serial data;
• a second transmitting channel comprising a second phase adjusting circuit and a second transmitter, wherein the second phase adjusting circuit receives the second clock signal set and generates a second spread spectrum clock signal with a second spread spectrum clock generator profile, wherein according to the second spread spectrum clock signal, the second transmitter generates a second serial data;
• a first receiving channel comprising a first receiver and a first clock and data recovery circuit, wherein a third serial data is received by the first receiver and transmitted to the first clock and data recovery circuit, and a first sampling clock is generated by the first clock and data recovery circuit according to a first specified clock signal of the first clock signal set, wherein the third serial data is sampled according to the first sampling clock;
• and
• a second receiving channel comprising a second receiver and a second clock and data recovery circuit, wherein a fourth serial data is received by the second receiver and transmitted to the second clock and data recovery circuit, and a second sampling clock is generated by the second clock and data recovery circuit according to a second specified clock signal of the second clock signal set, wherein the fourth serial data is sampled according to the second sampling clock.