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US 9,312,843 B2Granted
Comparison circuit and impedance calibration circuit using the same
AssigneeSK hynix Inc.
InventorHyun Sik Jeong
Life of this patent
Estimating the term…
Abstract
A comparison circuit includes: an offset removal unit configured to store offset information of a comparator in response to a reference voltage, and compare a pad voltage with the reference voltage based on the offset information to drive a first node; and a comparison signal output unit configured to buffer a signal of the first node and output a comparison signal.
Claims23
A comparison circuit comprising:
- an offset removal unit configured to store offset information of a comparator in response to a reference voltage, receive first to third period signals, and compare a pad voltage with the reference voltage based on the offset information to drive a first node;
- and
- a comparison signal output unit configured to buffer a signal of the first node and output a comparison signal for calibrating a resistance value of an on-die termination (ODT) circuit, wherein the first period signal is enabled during a first period, the second period signal is enabled during a second period, the third period signal is enabled during a third period, the first to third periods starting at the same time point.
An impedance calibration circuit comprising:
- a comparison circuit configured to receive first to third period signals and generate a comparison signal by comparing a reference voltage and a pad voltage;
- and
- a counter configured to count a code for calibrating a resistance value of an on-die termination (ODT) circuit in response to the comparison signal, and generate the first to third period signals,
- wherein the first period signal is enabled during a first period, the second period signal is enabled during a second period, the third period signal is enabled during a third period, the first to third periods starting at the same time point.
1 more element
Dependencies are inferred from the claim text.