Dynamic margin tuning for controlling custom circuits and memories
AssigneeApple Inc.
InventorAjay Kumar Bhatia
Life of this patent
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Abstract
Embodiments of a method that may allow for selectively tuning a delay of individual logic paths within a custom circuit or memory are disclosed. Circuitry may be configured to monitor a voltage level of a power supply coupled to the custom circuit or memory. A delay amount of a delay unit within the custom circuit or memory may be changed in response to a determination that the voltage level of the power supply has changed.
Claims18
An apparatus, comprising:
- a functional unit including a plurality of circuit paths, wherein each circuit path of the plurality of circuit paths includes at least one delay unit;
- and
- circuitry configured to:
- monitor a voltage level of a power supply;
- adjust a delay amount of the delay unit of a given circuit path of the plurality of circuit paths responsive to a determination that the voltage level of the power supply has changed;
- and
- pause operation of the functional unit in response to the determination that the voltage level of the power supply has changed.
A method for operating a functional unit included in an integrated circuit, wherein the functional unit includes a plurality of circuit paths, the method comprising:
- monitoring a voltage level of a power supply;
- pausing operation of the functional unit responsive to detecting a change in the voltage level of the power supply;
- adjusting a delay amount of a delay unit included in a first circuit path of the plurality of circuit paths responsive to determining that the operation of the functional unit has been paused;
- and
- resuming operation of the functional unit responsive to determining the delay amount of the delay unit of the first circuit path of the plurality of circuit paths has been adjusted.
A system, comprising:
- a processor;
- and
- a memory configured to:
- monitor a voltage level of a power supply;
- pause operation responsive to a detection of a change in the voltage level of the power supply;
- adjust a delay amount of a delay unit included in a circuit path included in an address decoder unit of the memory responsive to a determination that the operation has been paused;
- and
- resume operation responsive to a determination that the delay amount of the delay unit included in the circuit path included the address decoder unit has been adjusted.
Dependencies are inferred from the claim text.