Charge sharing analog computation circuitry and applications

A method for mapping input values to capacitor values to implement a programmable discrete time analog filter, comprising:

• accepting a plurality of filter coefficient input values;
• determining a plurality of digital configuration values for a plurality of configurable capacitors in the programmable analog frequency domain filter, wherein the plurality of digital configuration values are determined according to a non-linear mapping of the filter coefficient input values;
• and
• providing the digital configuration values for configuration of the programmable filter.

A programmable discrete time analog filter, comprising:

• an input for accepting a series of analog signal input values;
• a plurality of analog storage elements configurable to store the series of signal input values;
• a plurality of passive signal scaling circuits, each including a plurality of configurable capacitors, wherein each of the plurality of passive signal scaling circuits is configurable to accept one of the analog signal input values from one of the analog storage elements and store an analog representation of a scaled signal value;
• and
• means for accepting a plurality of filter coefficient input values and determining a plurality of digital configuration values for the plurality of configurable capacitors, wherein the plurality of digital configuration values are determined according to a non-linear mapping of the filter coefficient input value.