Driver device for power factor correction circuit

A driver device for a power factor correction circuit including first and second main switches that are switched on and off with a phase difference there between, and first and second auxiliary switches that provide conduction paths of surplus voltage in the first and second main switches before the first and second main switches are switched on, the driver device comprising:

• an input unit receiving a plurality of input signals wherein the input unit receives first and second input signals;
• an output unit outputting a first control signal for the first main switch, a second control signal for the second main switch, a third control signal for the first auxiliary switch, and a fourth control signal for the second auxiliary switch based on a plurality of input signals
• a PWM selecting unit selectively passing a PWM signal based on the first and second input signals, the PWM signal being a first internal signal
• a pulse generating unit outputting a second internal signal having a phase delayed with regard to a phase of the first internal signal and a third internal signal having a delayed phase and a reduced pulse width with regard to the first internal signal based on the first internal signals wherein the phase of the second internal signal is delayed with regard to that of the third internal signal
• a checking unit outputting a fourth internal signal including input signal information based on the first and second input signals wherein the checking unit outputs a high signal in the case that the first input signal is a PWM signal, and outputs a low signal in the case that the second input signal is a PWM signal
• a main signal generating unit outputting first and second control signals based on the second and fourth internal signals wherein the main signal generating unit, in the case that the fourth internal signal is a high signal, outputs the second internal signal as the first control signal and the high signal as the second control signal.