Transistor device
AssigneeSemiconductor Manufacturing International Corp.
InventorJianguang Chang
Life of this patent
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Abstract
Various embodiments provide transistors and fabrication methods. An exemplary transistor can include a silicon nitride layer disposed between a gate dielectric layer and a gate electrode layer. The silicon nitride layer can have a first surface in contact with the gate dielectric layer and a second surface in contact with the gate electrode layer. The second surface can include silicon atoms having a concentration higher than the first surface. A sidewall spacer can be formed on the semiconductor substrate along sidewalls of each of the gate electrode layer, the silicon nitride layer, and the gate dielectric layer. The disclosed transistor can have a reduced turn-on voltage with reduced power consumption.
Claims13
A transistor comprising:
- a semiconductor substrate;
- a gate dielectric layer disposed on the semiconductor substrate;
- a silicon nitride layer, disposed on the gate dielectric layer and including a double layer structure including a nitrogen-rich layer on the gate dielectric layer and a silicon-rich layer on the nitrogen-rich layer, such that the double layer structure includes a stepped band gap provided by the silicon-rich layer having a band gap and the nitrogen-rich layer having a different band gap,
- wherein an atom number ratio of nitrogen atoms to silicon atoms in the nitrogen-rich layer is greater than about 1.2, and the nitrogen-rich layer has a thickness ranging from about 1 nm to about 4 nm;
- a gate electrode layer disposed on the silicon nitride layer, wherein the silicon nitride layer includes a first surface in contact with the gate dielectric layer and a second surface opposite to the first surface, the second surface including silicon atoms having a concentration higher than the first surface;
- a sidewall spacer disposed on the semiconductor substrate and along sidewalls of each of the gate electrode layer, the silicon nitride layer, and the gate dielectric layer;
- and
- a source region and a drain region within the semiconductor substrate on both sides of the gate electrode layer and the sidewall spacer.
A transistor, comprising:
- a semiconductor substrate;
- a gate dielectric layer disposed on the semiconductor substrate;
- a silicon nitride layer, disposed on the gate dielectric layer and including a double layer structure including a nitrogen-rich layer on the gate dielectric layer and a silicon-rich layer on the nitrogen-rich layer, such that the double layer structure includes a stepped band gap provided by the silicon-rich layer having a band gap and the nitrogen-rich layer having a different band gap, and
- wherein an atom number ratio of nitrogen atoms to silicon atoms in the silicon-rich layer is less than about 1.2, and the silicon-rich layer has a thickness ranging from about 0.3 nm to about 1 nm;
- a gate electrode layer disposed on the silicon nitride layer, wherein the silicon nitride layer includes a first surface in contact with the gate dielectric layer and a second surface opposite to the first surface, the second surface including silicon atoms having a concentration higher than the first surface;
- a sidewall spacer disposed on the semiconductor substrate and along sidewalls of each of the gate electrode layer, the silicon nitride layer, and the gate dielectric layer;
- and
- a source region and a drain region within the semiconductor substrate on both sides of the gate electrode layer and the sidewall spacer.
Dependencies are inferred from the claim text.