FinFET with epitaxial source and drain regions and dielectric isolated channel region

A method comprising:

• providing at least one fin structure over a stacked structure of an insulator layer that is present over at least one semiconductor layer;
• providing a gate structure on a channel region portion of the at least one fin structure;
• removing exposed portions of the at least one fin structure;
• forming a sacrificial spacer on a sidewall of the gate structure;
• removing exposed portions of the insulator layer to provide a pedestal of insulating material exposing a portion of at least one semiconductor layer;
• forming a first epitaxial material layer on the portion of the at least one semiconductor layer exposed by removing the exposed portions of the insulator layer, the first epitaxial material layer contacting the sacrificial spacer;
• removing the sacrificial spacer;
• and
• forming a second epitaxial material layer in a space provided by said removing of the sacrificial spacer, the second epitaxial material layer contacting a sidewall of the at least one fin structure, wherein the first and second epitaxial material layers provide source and drain regions on opposing sides of the channel region portion of the at least one fin structure.