Floating gate flash cell with extended floating gate
AssigneeWafertech, LLC
InventorYimin Wang
Life of this patent
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Abstract
Provided is a floating gate flash cell and method for forming the same. The flash includes two floating gate transistors and a common source area therebetween. Each floating gate transistor includes a floating gate having a central portion disposed over a substrate surface and opposed lateral edges that extend into trenches and below the substrate surface. A control gate is disposed over said floating gate with a control gate dielectric between the floating gate and the control gate. The floating gates have side edges that are orthogonal to the opposed lateral edges and a common source area which is a substrate diffusion area, is positioned between respective facing side edges of the floating gates.
Claims20
A floating gate transistor comprising:
- a floating gate having a central portion disposed over a substrate surface, a first lateral edge extending into a first trench and below said substrate surface and an opposed second lateral edge extending into a second trench and below said substrate surface;
- a gate dielectric between said floating gate and said substrate surface and also between said first lateral edge and a sidewall of said first trench and between said second lateral edge and a sidewall of said second trench;
- a control gate at least partially over said floating gate;
- and
- a control gate dielectric between said floating gate and said control gate,
- wherein said first and second trenches are filled trenches that each include an oxide liner on said sidewalls thereof and a nitride layer over said oxide liner, said nitride layer having uppermost edges that terminate beneath said first and second lateral edges and beneath said substrate surface.
A floating gate flash cell comprising:
- two floating gate transistors and a common source area therebetween, each said floating gate transistor comprising:
- a floating gate having a central portion disposed over a substrate surface, a first lateral edge extending into a first trench and below said substrate surface and an opposed second lateral edge extending into a second trench and below said substrate surface, each of said first and second trenches being a filled trench with an oxide liner on sidewalls thereof and a nitride layer over said oxide liner and said nitride layer having uppermost edges that terminate beneath said first and second lateral edges and beneath said substrate surface;
- a gate dielectric between said floating gate and said substrate surface and also between said first lateral edge and a sidewall of said first trench and between said second lateral edge and a sidewall of said second trench;
- a control gate at least partially over said floating gate;
- and
- a control gate dielectric between said floating gate and said control gate,
- wherein each said floating gate further includes opposed side edges being orthogonal to said first and second lateral edges and said common source area is a diffusion area in said substrate surface and positioned adjacent each of respective facing side edges of each said floating gate transistor.
Dependencies are inferred from the claim text.