Ultra high voltage semiconductor device with electrostatic discharge capabilities

A semiconductor device comprising:

• a semiconductor substrate;
• a first layer over the semiconductor substrate;
• a drain region having a first doping type in the first layer, the drain region comprising
• a drain rectangular portion having a first end and a second end;
• a semicircular first drain end portion contiguous with the drain rectangular portion, the semicircular first drain end portion having a lower doping concentration than the drain rectangular portion;
• a semicircular second drain end portion contiguous with the drain rectangular portion, the semicircular second drain end portion having the same doping concentration as the semicircular first drain end portion;
• and
• a source region free from contact with and surrounding the drain region in the first layer,
• wherein some of the source region has the same doping type and the same doping concentration as the drain rectangular portion in an area parallel to the drain rectangular portion, and the source region is entirely free from having the same doping type and the same doping concentration as the drain rectangular portion in an area concentric with the semicircular first drain end portion and an area concentric with the semicircular second drain end portion.

A semiconductor device comprising:

• a drain region in a first layer, the drain region comprising:
• a drain central portion having a first end and a second end, the drain central portion having a first doping concentration;
• a first drain end portion adjacent to the first end of the drain central portion, the first drain end portion having a second doping concentration different from the first doping concentration;
• a second drain end portion adjacent to the second end of the drain central portion, the second drain end portion having the a third doping concentration different from the first doping concentration;
• a source region in the first layer, the source region surrounding the drain region;
• a gate electrode in a second layer over the source region;
• and
• an insulation layer between the source region and the drain region, and between the gate electrode and the drain region,
• wherein the first layer has a first surface, and the drain central portion, the first drain end portion and the second drain end portion are co-planar with respect to the first surface of the first layer.