Semiconductor device

A semiconductor device comprising:

• a semiconductor substrate of a first conductivity type;
• a first impurity diffusion region of a second conductivity type that is provided within the semiconductor substrate;
• a second impurity diffusion region of the first conductivity type that is provided within the first impurity diffusion region;
• a third impurity diffusion region of the second conductivity type that is provided within the second impurity diffusion region;
• a fourth impurity diffusion region of the second conductivity type;
• a fifth impurity diffusion region of the second conductivity type that is provided within the second impurity diffusion region;
• a first contact;
• a first power supply;
• a first gate provided on an upper portion of the second impurity diffusion region between the fourth impurity diffusion region and the third impurity diffusion region;
• and
• a second gate provided on an upper portion of the second impurity diffusion region between the fourth impurity diffusion region and the fifth impurity diffusion region,
• wherein:
• the second impurity diffusion region is disposed so as to, in plan view, be surrounded by a first region of the first impurity diffusion region and surround a second region of the first impurity diffusion region;
• the third impurity diffusion region and the fifth impurity diffusion region are disposed such that the second region is located therebetween in plan view;
• the fourth impurity diffusion region is disposed between the third impurity diffusion region and the fifth impurity diffusion region in plan view;
• the fourth impurity diffusion region includes a first portion, a second portion, and a third portion, the second portion is disposed in the second region, the first portion is disposed in the second impurity diffusion region toward the third impurity diffusion region so as to be spaced from the third impurity diffusion region, and the third portion is disposed in the second impurity diffusion region toward the fifth impurity diffusion region so as to be spaced from the fifth impurity diffusion region;
• the first portion, the second portion, and the third portion are continuous;
• the first contact is provided so as to be in contact with the second portion;
• the first power supply is connected to the third impurity diffusion region and the fifth impurity diffusion region;
• the first gate and the second gate are connected to a GND;
• and
• a part of the first gate and a part of the second gate overlap the fourth impurity diffusion region in plan view.