Small pitch patterns and fabrication method

A method for fabricating small pitch patterns device, comprising:

• providing a semiconductor substrate;
• forming a target material layer having a first region and a second region;
• forming a plurality of discrete first sacrificial layers on one surface of the first region of the target material layer and a plurality of discrete second sacrificial layers on the surface of the second region of the target material layer, wherein:
• widths of the first sacrificial layers are identical and defined as CDcore1, and the first sacrificial layers and spaces between two adjacent first sacrificial layers form a plurality of periodical patterns with a period of a first node distance defined as P1;
• and
• widths of the second sacrificial layers are identical and defined as CDcore2, and the second sacrificial layers and spaces between two adjacent second sacrificial layers form a plurality of periodical patterns with a period of a second node distance defined as P2, wherein the first node distance P1 is greater than the second node distance P2;
• CDcore1<½P1;
• CDcore2 <½P2;
• and ½P1−CDcore1=½P2−CDcore2;
• forming first sidewall spacers on both sides of the discrete first sacrificial layers and the discrete second sacrificial layers;
• removing the first sacrificial layers and the second sacrificial layers;
• forming second sidewall spacers on both sides of each of the first sidewall spacers, wherein the first sidewall spacers and the second sidewall spacers form a plurality of discrete first mask layers on the first region of the target material layer and form a non-discrete second mask layer on the second region of the target material layer;
• and
• forming discrete repeating patterns in the first region of the target material layer and a non-discrete pattern in the second region of the target material layer.