Thin film transistor array panel and a method for manufacturing the same
AssigneeSamsung Display Co., Ltd.
InventorsYoung-Wook Lee, Jang-Soo Kim
Life of this patent
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Abstract
A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
Claims22
A thin film transistor array panel comprising:
- a substrate;
- a gate line disposed on the substrate;
- a signal line disposed adjacent to an end part of the gate line;
- a data line intersecting the gate line;
- a thin film transistor connected to the gate line and the data line;
- an insulating layer covering the thin film transistor;
- a first electrode disposed on the insulating layer;
- a passivation layer disposed on the first electrode;
- and
- a second electrode disposed on the passivation layer and connected to the thin film transistor, wherein the passivation layer is between the second electrode and the substrate,
- wherein the first electrode overlaps the second electrode,
- wherein the first electrode overlaps the gate line and the data line, and is connected to the signal line at an edge portion of the thin film transistor array panel,
- wherein the signal line is disposed at a same layer as the gate line, and
- wherein the second electrode is disposed at a different layer than the signal line.
A thin film transistor array panel comprising:
- a substrate;
- a gate line disposed on the substrate;
- a signal line disposed adjacent to an end part of the gate line;
- a data line intersecting the gate line;
- a thin film transistor connected to the gate line and the data line;
- an insulating layer disposed on the thin film transistor;
- a first electrode disposed on the insulating layer;
- a passivation layer disposed on the first electrode;
- and
- a second electrode disposed on the passivation layer and connected to the thin film transistor,
- wherein the first electrode overlaps the second electrode,
- wherein the first electrode overlaps the gate line and the data line, and is connected to the signal line at an edge portion of the thin film transistor array panel,
- wherein the signal line is disposed at a same layer as the gate line, and
- wherein the insulating layer is an organic insulating layer.
A thin film transistor array panel comprising:
- a substrate;
- a gate line disposed on the substrate;
- a signal line disposed adjacent to an end part of the gate line;
- a data line intersecting the gate line;
- a thin film transistor connected to the gate line and the data line;
- an insulating layer disposed on the thin film transistor;
- an inorganic insulating layer disposed between the thin film transistor and the insulating layer;
- a first electrode disposed on the insulating layer;
- a passivation layer disposed on the first electrode;
- and
- a second electrode disposed on the passivation layer and connected to the thin film transistor,
- wherein the first electrode overlaps the second electrode,
- wherein the first electrode overlaps the gate line and the data line, and is connected to the signal line at an edge portion of the thin film transistor array panel,
- wherein the signal line is disposed at a same layer as the gate line.
Dependencies are inferred from the claim text.