Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorHidetomo Kobayashi
Life of this patent
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Abstract
A semiconductor device capable of retaining data for a long time is provided. The semiconductor device includes first to third transistors, a fourth transistor including first and second gates, first to third nodes, a capacitor, and an input terminal. A source of the first transistor is connected to the input terminal. A drain of the first transistor and a source of the second transistor are connected to the first node. A gate of the second transistor, a drain of the second transistor, and a source of the third transistor are connected to the second node. A gate of the third transistor, a drain of the third transistor, the capacitor, and the second gate of the fourth transistor are connected to the third node.
Claims17
A semiconductor device comprising:
- a first transistor;
- a second transistor;
- a third transistor;
- a fourth transistor including a first gate and a second gate;
- a capacitor;
- and
- an input terminal,
- wherein a gate of the first transistor is electrically connected to a third node,
- wherein one of a source and a drain of the first transistor is electrically connected to the input terminal,
- wherein the other of the source and the drain of the first transistor is electrically connected to a first node,
- wherein a gate of the second transistor is electrically connected to a second node,
- wherein one of a source and a drain of the second transistor is electrically connected to the first node,
- wherein the other of the source and the drain of the second transistor is electrically connected to the second node,
- wherein a gate of the third transistor is electrically connected to the third node,
- wherein one of a source and a drain of the third transistor is electrically connected to the second node,
- wherein the other of the source and the drain of the third transistor is electrically connected to the third node,
- wherein a first terminal of the capacitor is electrically connected to the third node,
- wherein the second gate is electrically connected to the third node, and
- wherein the first gate and the second gate overlap with each other with a semiconductor layer therebetween.
A semiconductor device comprising:
- a first transistor including a first gate and a second gate;
- a second transistor including a third gate and a fourth gate;
- a third transistor including a fifth gate and a sixth gate;
- a capacitor;
- an input terminal;
- and
- a memory cell comprising a fourth transistor including a seventh gate and a eighth gate,
- wherein one of a source and a drain of the first transistor is electrically connected to the input terminal,
- wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,
- wherein one of a source and a drain of the third transistor is electrically connected to the third gate and the other of the source and the drain of the second transistor, and
- wherein the first gate, the second gate, the fourth gate, the fifth gate, the sixth gate, the seventh gate, the other of the source and the drain of the third transistor, and a first terminal of the capacitor are electrically connected to each other.
Dependencies are inferred from the claim text.