Integrated circuits and manufacturing methods thereof

An integrated circuit comprising:

• a first diffusion area for a first type transistor, the first type transistor including a first drain region and a first source region in the first diffusion area;
• a second diffusion area for a second type transistor, the second diffusion area being separated from the first diffusion area, the second type transistor including a second drain region and a second source region in the second diffusion area;
• a gate electrode continuously extending across the first diffusion area and the second diffusion area in a routing direction;
• a first metallic structure comprising at least one first metal, the first metallic structure overlaps the first diffusion area in the routing direction and is electrically coupled with the first drain region;
• a second metallic structure comprising the at least one first metal, the second metallic structure overlaps the second diffusion area in the routing direction and is electrically coupled with the second drain region;
• a third metallic structure comprising at least one second metal different from the first metal, the third metallic structure having side surfaces;
• a fourth metallic structure electrically coupled with the first source region;
• and
• a fifth metallic structure over and electrically coupled with the fourth metallic structure,
• wherein
• the third metallic structure is over the first metallic structure, a portion of the third metallic structure that is over the first metallic structure has a substantially planar bottom surface in direct physical contact a substantially planar top surface of with the first metallic structure,
• the third metallic structure is over the second metallic structure, a portion of the third metallic structure that is over the second metallic structure has a substantially planar bottom surface in direct physical contact a substantially planar top surface of with the second metallic structure,
• the side surfaces of the third metallic structure are between the first metallic structure and the second metallic structure,
• the side surfaces of the third metallic structure are in direct physical contact with the first metallic structure and the second metallic structure,
• the fifth metallic structure and the first diffusion area overlap by a first distance in the routing direction,
• the third metallic structure and the first diffusion area overlap by a second distance in the routing direction, and
• the first distance is larger than the second distance.

An integrated circuit comprising:

• a first diffusion area for a first type transistor, the first type transistor including a first drain region and a first source region in the first diffusion area;
• a second diffusion area for a second type transistor, the second diffusion area being separated from the first diffusion area, the second type transistor including a second drain region and a second source region in the second diffusion area;
• a gate electrode continuously extending across the first diffusion area and the second diffusion area in a routing direction;
• a first metallic structure electrically coupled with the first drain region;
• a second metallic structure electrically coupled with the second drain region;
• a third metallic structure disposed over and electrically coupled with the first metallic structure and the second metallic structure, wherein a ratio of a width of the first metallic structure to a width of the third metallic structure ranges from about 1.3:1 to about 1.6:1;
• a fourth metallic structure electrically coupled with the first source region;
• a fifth metallic structure disposed over and electrically coupled with the fourth metallic structure, wherein the fifth metallic structure and the first diffusion area overlap by a first distance in the routing direction, the third metallic structure and the first diffusion area overlap by a second distance in the routing direction, the first diffusion area has a first width, a ratio of the first distance to the first width ranges from about 0.75:1 to about 1:1, and a ratio of the second distance to the first width ranges from about 0.1:1 to about 0.33:1;
• a sixth metallic structure electrically coupled with the second source region;
• and
• a seventh metallic structure disposed over and electrically coupled with the sixth metallic structure,
• wherein the seventh metallic structure and the second diffusion area overlap by a third distance in the routing direction, the third metallic structure and the second diffusion overlap by a fourth distance in the routing direction, the second diffusion area has a second width, a ratio of the third distance to the second width ranges from about 0.75:1 to about 1:1, and a ratio of the fourth distance to the second width ranges from about 0.1:1 to about 0.33:1.