Semiconductor multi-project or multi-product wafer process
AssigneeWeng-Dah Ken
InventorWeng-Dah Ken
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Abstract
The embodiment provides a semiconductor MP wafer process including processing a plurality of MP wafers in a lot or batch with a first process step. The plurality of the MP wafers is split into an MP wafer group-1 and an MP wafer group-2. At least one of the MP wafers of the MP wafer group-1 is processed with a second process step-1 and at least one of the MP wafers of the MP wafer group-2 is processed with a second process step-2 to form different device components on the MP wafers of the MP wafer group-1 and group-2, respectively. At least one of the MP wafers of the MP wafer group-1 is processed with a third process step-3 and at least one of the MP wafers of the MP wafer group-2 is processed with a third process step-4 to form a substantially same characteristic device component on the MP wafers.
Claims22
A semiconductor MP wafer process, comprising:
- processing a plurality of MP wafers with a first process step;
- splitting a plurality of the MP wafers into an MP wafer group-1 and an MP wafer group-2 after the first process step is completed;
- processing at least one of the MP wafers of the MP wafer group-1 with a second process step-1 and processing at least one of the MP wafers of the MP wafer group-2 with a second process step-2, wherein the second process step-1 and the second process step-2, respectively, forming different characteristic semiconductor device components on the one MP wafer of the MP wafer group-1 and on the one MP wafer of the MP wafer group-2, and wherein the second process step-1 and the second process step-2 associated with substantially the same technology generation;
- processing the one of the MP wafers of the MP wafer group-1 with a third process step-3 and processing the one of the MP wafers of the MP wafer group-2 with a third process step-4 after the second process step-1 and the second process step-2 are completed respectively, wherein the third process step-3 and the third process step-4 form substantially the same characteristic device components on the one MP wafer of the MP wafer group-1 and the one MP wafer of the MP wafer group-2;
- and
- processing the one of the MP wafers of the MP wafer group-1 and the one of the MP wafers of the MP wafer group-2 with a subsequent process to fabricate finished MP wafers.
A semiconductor MP wafer process, comprising:
- processing an MP wafer with a photolithography process using a mask;
- processing the MP wafer with a first process comprising an etching, a deposition or an ion-implantation process after the photolithography process is completed;
- processing the MP wafer with an ion-beam maskless lithography process;
- processing the MP wafer with a second process comprising an etching, a deposition or an ion-implantation processes which are associated with and after the ion-beam maskless lithography process;
- and
- processing the MP wafer with a subsequent process to fabricate a finished MP wafer.
A high yield semiconductor wafer dicing, scribe and chip separation process, comprising:
- forming a plurality of IC designs with different chip sizes on a semiconductor wafer, wherein the plurality of IC designs respectively containing a lithography patterning information, metal interconnection pattern, inter-layer via hole pattern or chip dimension are different;
- processing a first wafer scribe process comprising Laser on the wafer, wherein the Laser process removes an enough portion of surface material or layer on the scribe line area of the wafer;
- and
- applying a subsequent process to the wafer, wherein the subsequent process at least comprises a die picking up process, and the die picking up process is used for separating individual dies of the plurality of IC designs out of the wafer having diced.
Dependencies are inferred from the claim text.