Semiconductor package with thermal via and method for fabrication thereof
AssigneeFreescale Semiconductor, Inc.
InventorsWeng F. Yap, Scott M. Hayes
Life of this patent
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Abstract
A semiconductor package includes a semiconductor die having an active face and dielectric layers disposed on the active face of the semiconductor die. At least one opening is formed through the dielectric layers and extends from a non-bond pad area of the active face to an exterior surface of the dielectric layers. An electrically conductive layer is formed in the opening and is in physical contact with the active face of the semiconductor die. A thermally conductive material fills the opening to form a thermal via for dissipating heat away from the semiconductor die.
Claims12
A semiconductor package comprising:
- a semiconductor die having an active face, said active face including bond pads and a non-bond pad area defined by an absence of said bond pads;
- at least one dielectric layer disposed on said active face of said semiconductor die, wherein at least one opening is formed through said at least one dielectric layer, said at least one opening extending from said non-bond pad area of said active face to an exterior surface of said at least one dielectric layer;
- an electrically conductive layer formed in said at least one opening, said electrically conductive layer being in physical contact with said non-bond pad area of said active face;
- and
- a thermally conductive material filling said at least one opening to form a thermal via, wherein:
- said at least one dielectric layer comprises a first dielectric layer in physical contact with said active face of said semiconductor die and a second dielectric layer disposed in a layered arrangement with said first dielectric layer;
- said at least one opening comprises a first opening and a second opening laterally displaced away from said first opening in a direction parallel to said active face of said semiconductor die;
- said first and second openings extend through said first dielectric layer;
- said electrically conductive layer is formed in each of said first and second openings;
- and
- said at least one opening further comprises a third opening and a fourth opening extending through said second dielectric layer, said third opening being aligned with said first opening, and said fourth opening being aligned with said second opening.
A method of forming at least one thermal via in a semiconductor package comprising:
- forming a first opening and a second opening in a first dielectric layer disposed on an active face of a semiconductor die, wherein said first and second openings are formed through said first dielectric layer from a non-bond pad area of said active face, said non-bond pad area being defined by an absence of bond pads, and said second opening is laterally displaced away from said first opening;
- forming an electrically conductive layer in in each of said first and second openings, said electrically conductive layer being in physical contact with said non-bond pad area of said active face;
- depositing another dielectric layer in a layered arrangement over said first dielectric layer;
- forming a third opening in said another dielectric layer over said first opening;
- forming a fourth opening in said another dielectric layer over said second opening;
- and
- concurrently filling said said first opening, second opening, third, and fourth openings with a thermally conductive material to form said at least one thermal via.
Dependencies are inferred from the claim text.