Metal on elongated contacts
AssigneeTexas Instruments Incorporated
InventorsJames Walter Blatchford, Scott William Jessen
Life of this patent
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Abstract
An integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, and including elongated contacts which connect to exactly two active areas and/or MOS gates and directly connect to a first level interconnect. A process of forming an integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, using exactly two contact photolithographic exposure operations, and including elongated contacts which connect to exactly two active areas and/or MOS gates and directly connect to a first level interconnect.
Claims14
A method of forming an integrated circuit, comprising:
- forming elements of field oxide at a top surface of a substrate, so that regions of the substrate between the field oxide are active areas;
- forming MOS transistor gates over the substrate;
- forming a PMD layer over the active areas and the MOS transistor gates;
- forming a contact hard mask layer over the PMD layer;
- forming a positive acting first contact photosensitive layer over the contact hard mask layer;
- performing a first contact subpattern exposure operation and a first contact subpattern develop operation on the integrated circuit to form a first plurality of contact patterned regions in the first contact photosensitive layer;
- performing a first contact hard mask etch process on the integrated circuit to form a first plurality of contact hard mask openings in the contact hard mask layer under the first plurality of contact patterned regions;
- removing the first contact photosensitive layer;
- forming a positive acting second contact photosensitive layer over the contact hard mask layer;
- performing a second contact subpattern exposure operation and a second contact subpattern develop operation on the integrated circuit to form a second plurality of contact patterned regions in the second contact photosensitive layer;
- performing a second contact hard mask etch process on the integrated circuit to form a second plurality of contact hard mask openings in the contact hard mask layer under the second plurality of contact patterned regions;
- removing the second contact photosensitive layer;
- etching a plurality of contact holes in the PMD layer in areas defined by the first plurality of contact hard mask openings and the second plurality of contact hard mask openings;
- filling the contact holes with contact metal to form a plurality of contacts, so that a subset of the plurality of contacts are elongated contacts, wherein:
- a first plurality of the elongated contacts directly connect to at least three of any combination of the active areas and the MOS transistor gates;
- and
- a second plurality of the elongated contacts directly connect to exactly two of any combination of the active areas and the MOS transistor gates;
- forming an interconnect photosensitive layer above the PMD layer and the contacts;
- forming an IMD layer above the PMD layer;
- and
- forming a plurality of first level interconnects in the IMD layer, so that each member of the second plurality of the elongated contacts is directly connected to at least one of the first level interconnects.
A method of forming an integrated circuit, comprising:
- providing a substrate;
- forming elements of field oxide at a top surface of the substrate, so that regions of the substrate between the field oxide are active areas;
- forming MOS transistor gates over the substrate;
- forming a PMD layer over the active areas and the MOS transistor gates;
- forming a positive acting first contact photosensitive layer over the PMD layer;
- performing a first contact subpattern exposure operation and a first contact subpattern develop operation on the integrated circuit to form a first plurality of contact patterned regions in the first contact photosensitive layer;
- performing a first contact etch process on the integrated circuit to form a first plurality of contact holes in the PMD layer under the first plurality of contact patterned regions;
- removing the first contact photosensitive layer;
- forming a positive acting second contact photosensitive layer over the PMD layer;
- performing a second contact subpattern exposure operation and a second contact subpattern develop operation on the integrated circuit to form a second plurality of contact patterned regions in the second contact photosensitive layer;
- performing a second contact etch process on the integrated circuit to form a second plurality of contact holes in the PMD layer under the second plurality of contact patterned regions;
- removing the second contact photosensitive layer;
- filling the contact holes with contact metal to form a plurality of contacts, so that a subset of the plurality of contacts are elongated contacts, wherein:
- a first plurality of the elongated contacts directly connect to at least three of any combination of the active areas and the MOS transistor gates;
- and
- a second plurality of the elongated contacts directly connect to exactly two of any combination of the active areas and the MOS transistor gates;
- forming an IMD layer above the PMD layer;
- and
- forming a plurality of first level interconnects in the IMD layer, so that a plurality of interconnects in the additional levels directly connects to a plurality of the first level interconnects.
Dependencies are inferred from the claim text.