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US 9,312,017 B2Granted
Storage in charge-trap memory structures using additional electrically-charged regions
AssigneeApple Inc.
InventorsArik Rizel, Avraham Poza Meir, Yael Shur, Eyal Gurgi, Barak Baum
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Abstract
A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.
Claims20
A device, comprising:
- a memory, comprising multiple control gates coupled to a common charge-trap layer;
- and
- a read/write (R/W) unit, which is configured to:
- program the memory by creating a set of electrically-charged regions within the common charge-trap layer;
- and
- read the memory by detecting at least a subset of the set of electrically-charged regions;
- wherein at least a first electrically-charged region in the set is associated with at least two control gates of the multiple control gates;
- and wherein at least a second electrically-charged region in the set is associated with a single respective control gate of the multiple control gates.
5 more elements
A method, comprising:
- providing a memory, which comprises multiple control gates coupled to a common charge-trap layer;
- programming the memory by creating a set of electrically-charged regions within the common charge-trap layer;
- and
- reading the memory by reading at least a subset of the set of electronically-charged regions;
- wherein at least a first electrically-charged region in the set is associated with at least two control gates of the multiple control gates;
- and wherein at least a second electrically-charged region in the set is associated with a single respective control gate of the multiple control gates.
3 more elements
Dependencies are inferred from the claim text.