Multi-level cell memory device and method of operating multi-level cell memory device

A read method executed by a multi-level cell memory device which is connected with a memory controller, the method comprising:

• receiving a first read command;
• reading, in response to receiving the first read command, first and second hard decision data by performing first and second hard decision read operations using a first hard decision read voltage and a second hard decision read voltage, respectively, the second hard decision read voltage being different from the first hard decision read voltage;
• selecting one of the first and second hard decision read voltages as a selected hard decision read voltage;
• reading first soft decision data by performing a first soft decision read operation using a plurality of soft decision read voltages corresponding to the selected hard decision read voltage and having respective voltage levels which are different from each other and the voltage level of the selected hard decision read voltage;
• and
• providing the first soft decision data to the memory controller for first error correction code (ECC) decoding, wherein
• the selection of one of the first and second hard decision read voltages is made according to comparison results obtained using the first and second hard decision read data.

A read method executed by a multi-level cell memory device, the method comprising:

• receiving a first read command;
• performing, in response to receiving the first read command, first and second hard decision read operations using respective first and second hard decision read voltages, which are different from each other, to read first and second hard decision data;
• upon a failure of error bit correction on the first and second hard decision data, receiving a second read command;
• reading, in response to receiving the second read command, first soft decision data using a plurality of first soft decision read voltages corresponding to the first hard decision read voltage and having voltage levels that differ from each other and the voltage level of the first hard decision read voltage;
• providing the first soft decision data to an external device for first error correction code (ECC) decoding;
• reading, in response to receiving from the external device a signal indicating a failure of the first ECC decoding on the first soft decision data, second soft decision data by performing a second soft decision read operation using a plurality of second soft decision read voltages corresponding to the second hard decision read voltage and having respective voltage levels which are different from each other and the voltage level of the second hard decision read voltage;
• and
• providing the second soft decision data to the outside of the multi-level cell memory device for second ECC decoding.