Non-volatile memory and associated memory array, row decoder, column decoder, write buffer and sensing circuit

A non-volatile memory, comprising:

• a memory array comprising m×n memory cells, wherein the memory array is connected with m word lines and n bit lines;
• a row decoder connected with the m word lines for activating one of the m word lines, thereby determining a selected row of n memory cells, wherein the n memory cells in the selected row are connected with the n bit lines;
• a column decoder comprising a programming decoder and a reading decoder, wherein the programming decoder includes n input terminals directly connected with the n bit lines and an output terminal connected with a programming data line, and the reading decoder includes n input terminals directly connected with the n bit lines and an output terminal connected with a reading data line, wherein the programming decoder is operated according to a programming control signal set, and the reading decoder is operated according to a reading control signal set;
• a write buffer directly connected with the programming decoder through the programming data line;
• and
• a sensing circuit directly connected with the reading decoder through the reading data line,
• wherein during a program cycle, the reading control signal set is inactivated but the programming control signal set is activated, so that the programming decoder determines a selected memory cell from the selected row of n memory cells, wherein a cell current generated by the selected memory cell flows to the write buffer through the programming decoder and the programming data line,
• wherein during a read cycle, the programming control signal set is inactivated but the reading control signal set is activated, so that the reading decoder determines the selected memory cell from the selected row of n memory cells, wherein the cell current generated by the selected memory cell flows to the sensing circuit through the reading decoder and the reading data line.