Semiconductor memory device and method of performing setting operation in semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsChika Tanaka, Reika Ichihara, Yoshihisa Iwata
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AssigneeKabushiki Kaisha Toshiba
InventorsChika Tanaka, Reika Ichihara, Yoshihisa Iwata
Estimating the term…
A semiconductor memory device comprises: a plurality of first lines; a plurality of second lines extending to intersect the first lines; a plurality of memory cells disposed respectively at intersections of the first and second lines and including a variable resistance element; and a control circuit configured to control a voltage applied to the memory cell. The control circuit is configured able to, during a setting operation that changes the memory cell to a set state, execute the setting operation such that a setting voltage is applied to a selected memory cell connected to a selected first line and a selected second line. The control circuit is configured able to change a voltage application time of the setting voltage according to a state of change of the selected memory cell during the setting operation to execute an additional setting operation that applies the setting voltage to the selected memory cell.
A semiconductor memory device, comprising:
A method of performing a setting operation in a semiconductor memory device, the setting operation being an operation that changes a memory cell from a reset state to a set state, the device comprising:
A semiconductor memory device, comprising:
Dependencies are inferred from the claim text.