Writing and verifying circuit for a resistive memory and method for writing and verifying a resistive memory
AssigneeWinbond Electronics Corp.
InventorKoying Huang
Life of this patent
Estimating the term…
Abstract
A writing and verifying circuit and a method for writing and verifying a resistive memory thereof are provided. The steps of the method includes: enabling at least one word line signal corresponding to at least one selected resistive memory cell of the resistive memory during a writing and verifying timing period; providing a bit line voltage to the selected resistive memory cells, wherein the bit line voltage continuously increases or decreases from a first voltage level to a second voltage level during the writing and verifying timing period; and, measuring a detected current through the bit line and determining a finish time point of the writing and verifying timing period according to the detected current and a reference current.
Claims17
A writing and verifying circuit for a resistive memory, comprising:
- a current generator, generating a current according to a bit line voltage, and generating a bias voltage according to the reference current, wherein the bit line voltage continuously increases or decreases from a first voltage level to a second voltage level during a writing and verifying timing period;
- and
- at least one current detector, coupled to the reference current generator and a bit line of a selected resistive memory cell of the resistive memory, providing the bit line voltage to the selected resistive memory cell and generating a detected voltage according to a detected current on the bit line,
- wherein, the at least one current detector determining a finish time point of the writing and verifying timing period by comparing the detect voltage and the bias voltage.
A method for writing and verifying a resistive memory, comprising:
- enabling at least one word line signal corresponding to at least one selected resistive memory cell of the resistive memory during a writing and verifying timing period;
- providing a bit line voltage to the selected resistive memory cell, wherein the bit line voltage continuously increases or decreases from a first voltage level to a second voltage level during the writing and verifying timing period;
- and
- measuring a detected current through a bit line of the selected resistive memory cell and determining a finish time point of the writing and verifying timing period according to the detected current and a reference current.
Dependencies are inferred from the claim text.