Non-volatile memory device

A memory device comprising:

• a first memory cell comprising a first resistive non-volatile data storage element programmable to store a first bit of data and a first data latch coupled to said first resistive element;
• and
• a second memory cell comprising a second resistive non-volatile data storage element programmable to store a second bit of data and a second data latch coupled to said second resistive element and to said first data latch;
• wherein:
• said first resistive element is configured to have a first data retention duration, and said second resistive element is configured to have a second data retention duration different from said first data retention duration;
• said first resistive element is programmable to have one of at least two resistive states and said first memory cell comprises a third resistive element, said first bit of data being represented by the relative resistances of the first and third resistive elements;
• said second resistive element is programmable to have one of at least two resistive states and said second memory cell comprises a fourth resistive element, said second bit of data being represented by the relative resistances of the second and fourth resistive elements;
• and
• the first resistive element is coupled between a first storage node of said first data latch and a first intermediate node, and the third resistive element is coupled between a second storage node of said first data latch and a second intermediate node, the first memory cell further comprising:
• a first transistor of said first latch coupled between said first storage node and a first supply voltage;
• a second transistor of said first latch coupled between said second storage node and said first supply voltage, wherein a control node of said first transistor is coupled to said second storage node and a control node of said second transistor is coupled to said first storage node;
• a third transistor coupled between the first and second intermediate nodes;
• and
• control circuitry configured to activate said third transistor while applying a second supply voltage to said first or second storage node to generate a programming current in a selected direction through said first and third resistive elements to program the resistive state of at least one of said elements.

A memory device comprising:

• a first memory cell comprising a first resistive non-volatile data storage element programmable to store a first bit of data;
• and
• a second memory cell comprising a second resistive non-volatile data storage element programmable to store a second bit of data;
• wherein said first resistive element is configured to have a first data retention duration, and said second resistive element is configured to have a second data retention duration different from said first data retention duration;
• and
• wherein said first and second resistive elements are each spin transfer torque elements with in-plane anisotropy or perpendicular-to-plane anisotropy and formed of a plurality of stacked layers, wherein the volume of at least one of the layers of said first resistive element is different from a corresponding layer of said resistive second element.

A method of storing an input data value in non-volatile storage of a memory device, the memory device comprising a first memory cell comprising a first resistive non-volatile data storage element programmable to store a first bit of data;

• and a second memory cell comprising a second resistive non-volatile data storage element programmable to store a second bit of data, wherein said first resistive element is configured to have a first data retention duration, and said second resistive element is configured to have a second data retention duration different from said first data retention duration wherein said first and second resistive elements are each spin transfer torque elements with in-plane anisotropy or perpendicular-to-plane anisotropy and formed of a plurality of stacked layers, wherein the volume of at least one of the layers of said first resistive element is different from a corresponding layer of said resistive second element, the method comprising:
• selecting, based on a data retention duration associated with said input data value, one of said first and second resistive elements;
• and
• programming the selected resistive element to store the input data value.