Semiconductor device, electronic component, and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsTakanori Matsuzaki, Hiroki Inoue
Life of this patent
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Abstract
A highly reliable semiconductor device. In a configuration where a precharged source line is discharged to a bit line by establishing electrical continuity between the source line and the bit line through a transistor to read a potential retained at a gate of the transistor, the potential of the bit line is switched in accordance with a change in potential of the source line due to the discharge. With this configuration, the voltage between the source and drain of the transistor can be kept lower than a predetermined voltage by discharge. Accordingly, the source-drain voltage of the transistor can be kept lower than its breakdown voltage, so that the semiconductor device can have high reliability.
Claims10
A semiconductor device comprising:
- a memory cell comprising a first transistor, a second transistor, and a capacitor;
- a first wiring;
- and
- a second wiring,
- wherein:
- the memory cell is capable of retaining a charge corresponding to a data voltage at a node,
- the node is electrically connected to one of electrodes of the capacitor,
- the node is electrically connected to a gate of the first transistor,
- the node is electrically connected to one of a source and a drain of the second transistor,
- a step of reading out and transferring the data voltage to the first wiring comprises a first step, a second step, and a third step,
- the first step comprises a step of precharging the first wiring,
- the second step comprises a step of discharging a potential of the first wiring to the second wiring through the first transistor in accordance with the data voltage,
- the third step comprises a step of changing the potential of the first wiring close to a first potential,
- the first potential is the sum of a potential of the node and a threshold voltage of the first transistor, and
- in the second step, a potential of the second wiring is switched in accordance with change in the potential of the first wiring.
A semiconductor device comprising:
- a memory cell comprising a first transistor, a second transistor, and a capacitor;
- a first wiring;
- and
- a second wiring,
- wherein:
- the memory cell is capable of retaining a charge corresponding to a data voltage at a node,
- the node is electrically connected to one of electrodes of the capacitor,
- the node is electrically connected to a gate of the first transistor,
- the node is electrically connected to one of a source and a drain of the second transistor,
- a step of reading out and transferring the data voltage to the first wiring comprises a first step, a second step, and a third step,
- the first step comprises a step of precharging the first wiring,
- the second step comprises a step of discharging a potential of the first wiring to the second wiring through the first transistor in accordance with the data voltage,
- the third step comprises a step of changing the potential of the first wiring close to a first potential,
- the first potential is the sum of a potential of the node and a threshold voltage of the first transistor, and
- in the second step, a difference between a potential of the second wiring and the potential of the first wiring is controlled to be less than a given voltage.
Dependencies are inferred from the claim text.