Semiconductor memory device for conducting monitoring operation to verify read and write operations
AssigneeSK hynix Inc.
InventorJin Ah Kim
Life of this patent
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Abstract
A semiconductor memory device includes, in part, a first data I/O block and a second data I/O block. During a write operation, the first data I/O block transmits input data supplied through a first pad to a first global I/O line, and further generates a write internal signal. The second data I/O block transmits the write internal signal to a second pad in response to a monitor enable signal. During a read operation, the first data I/O block supplies data from the first global I/O line to a first pad, and further generates a read internal signal. The second data I/O block transmits the read internal signal to the second pad in response to a monitor enable signal.
Claims8
A semiconductor memory device comprising:
- a first data input block configured to:
- buffer a first input data supplied through a first pad to generate a first internal input data;
- load the first internal input data onto a first global I/O line during a first write operation;
- and
- generate a write internal signal during the first write operation;
- a second data input block configured to:
- buffer a second input data supplied through a second pad to generate a second internal input data;
- execute a second write operation to load the second internal input data on a second global I/O line;
- and
- a data I/O block configured to:
- transmit the write internal signal to a third pad in response to a monitor enable signal;
- and
- execute a third write operation to load the second internal input data onto a third global I/O line.
Dependencies are inferred from the claim text.