Display panel and scanning circuit
AssigneeAu Optronics Corporation
InventorShih-Song Cheng
Life of this patent
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Abstract
A display panel and a scanning circuit are disclosed herein. The scanning circuit includes a plurality of shift registers. Each of the shift registers includes a driving unit, a control unit, and an operating unit. The driving unit is configured to receive a start signal and a driving clock signal, and provide a scan signal to an output end according to the start signal and the driving clock signal. The control unit is configured to provide a second voltage to the output end according to a first voltage on a control node, and to provide the second voltage to a driving end according to the first voltage on the control node. The operating unit is configured to operatively provide the first voltage to the control node according to an operating clock signal after the scan signal is outputted.
Claims19
A scan circuit comprising a plurality of shift registers electrically connected in series to each other, each of the shift registers comprising:
- a driving unit configured to receive a start signal and a driving clock signal, and provide a scan signal to an output end according to the start signal and the driving clock signal;
- a control unit electrically connected to the driving unit through a driving node, wherein the control unit is configured to provide a second voltage to the output end according to a first voltage on a control node, and to provide the second voltage to the driving node according to the first voltage on the control node;
- and
- an operating unit electrically connected to the control unit through the control node, wherein the operating unit is configured to operatively provide the first voltage to the control node according to an operating clock signal in each cycle period of the operating clock signal after the scan signal is outputted;
- wherein the operating unit comprises a first operating switch and a second operating switch, and in one state, both of the first operating switch and the second operating switch are switched on according to the operating clock signal to conduct the first voltage to the control node.
A display panel comprising a scan circuit, wherein the scan circuit comprises a plurality of shift registers, and the shift registers are electrically connected in series to each other, each of the shift registers comprising:
- a first driving switch electrically connected between a driving node and a first voltage and configured to operatively be turned on according to a start signal;
- a second driving switch electrically connected to an output end, wherein the second driving switch is configured to receive a driving clock signal and to operatively be turned on according to the first voltage on the driving node;
- a first capacitor electrically connected between the driving node and the output end;
- a first control switch electrically connected between the driving node and a second voltage and configured to operatively be turned on according to the first voltage on a control node;
- a second control switch electrically connected between the output end and the second voltage and configured to operatively be turned on according to the first voltage on the control node;
- a second capacitor electrically connected between the control node and the first voltage;
- a first operating switch;
- a second operating switch, wherein the first operating switch and the second operating switch are electrically connected to each other in series and are electrically connected between the control node and the first voltage;
- a third operating switch electrically connected between the second voltage and the operating node and configured to operatively be turned on according to the start signal;
- a fourth operating switch electrically connected between the second voltage and the control node and configured to operatively be turned on according to the start signal;
- and
- a third capacitor electrically connected to an operating node and configured to receive an operating clock signal;
- wherein the first operating switch and the second operating switch are configured to operatively be turned on according to the operating clock signal, so as to provide the first voltage to the control node in at least every two line times.
Dependencies are inferred from the claim text.