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US 9,311,849 B2Granted
Inverter, AMOLED compensation circuit and display panel
AssigneeShanghai Tianma Micro-Electronics Co., Ltd.
InventorDong Qian
Life of this patent
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Abstract
An inverter is disclosed. The disclosed inverter includes first, second, third, and fourth transistors, where each of the first, second, third, and fourth transistors is a P-type thin film transistor. The inverter also includes a first capacitor. The inverter allows for wide voltage output swing performance and low power consumption.
Claims6
An inverter, comprising:
- a first, second, third, and fourth transistors, wherein each of the first, second, third, and fourth transistors is a P-type thin film transistor;
- and
- a first capacitor,
- wherein a gate of the first transistor is connected with a gate of the third transistor, and the gate of the first transistor and the gate of the third transistor are connected to an input terminal of a first signal,
- wherein a source of the first transistor is connected with a source of the third transistor, and the source of the first transistor and the source of the third transistor are connected to an input terminal of a second signal,
- wherein a drain of the first transistor is connected with a gate of the fourth transistor and a source of the second transistor at a first node,
- wherein a gate of the second transistor is connected with an input terminal of a second clock signal, a drain of the second transistor is connected with a drain of the fourth transistor, and the drain of the second transistor and the drain of the fourth transistor are connected to an input terminal of a third signal,
- wherein a drain of the third transistor is connected with a source of the fourth transistor, and the drain of the third transistor and the source of the fourth transistor are connected to a signal output terminal of the inverter,
- wherein the first capacitor has one terminal connected with the first node and has another terminal connected with an input terminal of a first clock signal, and
- wherein a high voltage signal is input to the input terminal of the second signal, and a low voltage signal is input to the input terminal of the third signal.
7 more elements
A compensation circuit of an active matrix organic light-emitting diode display panel, the circuit comprising:
- an inverter, comprising:
- a first, second, third, and fourth transistors, wherein each of the first, second, third, and fourth transistors is a P-type thin film transistor;
- and
- a first capacitor,
- wherein a gate of the first transistor is connected with a gate of the third transistor, and the gate of the first transistor and the gate of the third transistor are connected to an input terminal of a first signal,
- wherein a source of the first transistor is connected with a source of the third transistor, and the source of the first transistor and the source of the third transistor are connected to an input terminal of a second signal,
- wherein a drain of the first transistor is connected with a gate of the fourth transistor and a source of the second transistor at a first node,
- wherein a gate of the second transistor is connected with an input terminal of a second clock signal, a drain of the second transistor is connected with a drain of the fourth transistor, and the drain of the second transistor and the drain of the fourth transistor are connected to an input terminal of a third signal,
- wherein a drain of the third transistor is connected with a source of the fourth transistor, and the drain of the third transistor and the source of the fourth transistor are connected to a signal output terminal of the inverter,
- wherein the first capacitor has one terminal connected with the first node and has another terminal connected with an input terminal of a first clock signal, and
- wherein a high voltage signal is input to the input terminal of the second signal, and a low voltage signal is input to the input terminal of the third signal.
8 more elements
A display panel, comprising a compensation circuit for an active matrix organic light-emitting diodes display panel, wherein the compensation circuit comprises an inverter, the inverter comprising:
- a first, second, third, and fourth transistors, wherein each of the first, second, third, and fourth transistors is a P-type thin film transistor;
- and
- a first capacitor,
- wherein a gate of the first transistor is connected with a gate of the third transistor, and the gate of the first transistor and the gate of the third transistor are connected to an input terminal of a first signal,
- wherein a source of the first transistor is connected with a source of the third transistor, and the source of the first transistor and the source of the third transistor are connected to an input terminal of a second signal,
- wherein a drain of the first transistor is connected with a gate of the fourth transistor and a source of the second transistor at a first node,
- wherein a gate of the second transistor is connected with an input terminal of a second clock signal, a drain of the second transistor is connected with a drain of the fourth transistor, and the drain of the second transistor and the drain of the fourth transistor are connected to an input terminal of a third signal,
- wherein a drain of the third transistor is connected with a source of the fourth transistor, and the drain of the third transistor and the source of the fourth transistor are connected to a signal output terminal of the inverter, wherein the first capacitor has one terminal connected with the first node and has another terminal connected with an input terminal of a first clock signal, and
- wherein a high voltage signal is input to the input terminal of the second signal, and a low voltage signal is input to the input terminal of the third signal.
6 more elements
Dependencies are inferred from the claim text.