Selectively merging partially-covered tiles to perform hierarchical z-culling
AssigneeQUALCOMM Incorporated
InventorsTao Wang, Andrew Evan Gruber, Shambhoo Khandelwal
Life of this patent
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AssigneeQUALCOMM Incorporated
InventorsTao Wang, Andrew Evan Gruber, Shambhoo Khandelwal
Estimating the term…
This disclosure describes techniques for performing hierarchical z-culling in a graphics processing system. In some examples, the techniques for performing hierarchical z-culling may involve selectively merging partially-covered source tiles for a tile location into a fully-covered merged source tile based on whether conservative farthest z-values for the partially-covered source tiles are nearer than a culling z-value for the tile location, and using a conservative farthest z-value associated with the fully-covered merged source tile to update the culling z-value for the tile location. In further examples, the techniques for performing hierarchical z-culling may use a cache unit that is not associated with an underlying memory to store conservative farthest z-values and coverage masks for merged source tiles. The capacity of the cache unit may be smaller than the size of cache needed to store merged source tile data for all of the tile locations in a render target.
A method comprising:
A device comprising:
Dependencies are inferred from the claim text.