Net-voltage-aware optical proximity correction (OPC)
AssigneeGlobalfoundries Inc.
InventorsShayak Banerjee, James A. Culp, Ian P. Stobert
Life of this patent
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AssigneeGlobalfoundries Inc.
InventorsShayak Banerjee, James A. Culp, Ian P. Stobert
Estimating the term…
Various embodiments include computer-implemented methods, computer program products and systems for verifying an integrated circuit (IC) layout. In some cases, approaches include a computer-implemented method of verifying an IC layout, the method including: obtaining data about a process variation band for at least one physical feature in the IC layout; determining voltage-based process variation band thresholds for the at least one physical feature in the IC layout; determining whether the process variation band for the at least one physical feature in the IC layout meets design specifications for the IC layout based upon the voltage-based process variation band thresholds for the at least one physical feature in the IC layout; and modifying the IC layout in response to a determination that the process variation band for the at least one physical feature does not meet the design specifications.
A computer-implemented method, performed on at least one computing device, of verifying an integrated circuit (IC) layout, the method comprising:
A system comprising:
A computer program product comprising program code stored on a non-transitory computer readable storage medium, which when executed by at least one computing device, causes the at least one computing device to verify an integrated circuit (IC) layout by performing actions including:
Dependencies are inferred from the claim text.