Hidden base address register programming in peripheral component interconnect express buses
AssigneeNational Instruments Corporation
InventorsCraig S. Jones, Jonathan W. Hearn, Jason D. Tongen
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AssigneeNational Instruments Corporation
InventorsCraig S. Jones, Jonathan W. Hearn, Jason D. Tongen
Estimating the term…
A mapping and correspondence may be established between a virtual topology and a physical topology of a PCIe subsystem, and a host may be presented with the virtual topology but not the actual physical topology. A semi transparent bridge may couple an upstream host to the PCIe subsystem that includes intermediary bridges and respective PCIe endpoints coupled downstream from the intermediary bridges. The intermediary bridges may be hidden from the host, while the respective PCIe endpoints may be visible to the host. A configuration block may provide to the upstream host, during a setup mode, first memory allocation information corresponding to the intermediary switches, responsive to the upstream host expecting second memory allocation information corresponding to the respective PCIe endpoints. The configuration block may then provide to the upstream host, during a runtime mode, the second memory allocation information, responsive to the upstream host expecting the second memory allocation information.
A system comprising:
A configuration block for configuring a switch fabric subsystem that comprises switch fabric devices to be coupled to a host system, the configuration block comprising:
A method for configuring and operating switch fabric devices comprised in a switch fabric subsystem coupled to a host system, the method comprising:
Dependencies are inferred from the claim text.