Semiconductor memory device, memory system and method of operating the same
AssigneeSK hynix Inc.
InventorsSang Hyun Song, Won Sun Park
Life of this patent
Estimating the term…
Abstract
A memory system including a plurality of memory chips is provided. The memory system includes a first memory chip and a second memory chip that share a data bus and become active by a chip enable signal, and a controller transmitting multi chip select commands to the first and second memory chips. The first memory chip, in response to the first multichip select command, receives a first operation request transmitted by the controller through the data base, and the second memory chip, in response to the second multichip select command, receives a second operation request transmitted by the controller through the data bus before the first memory chip operates according to the first operation request.
Claims19
A memory system comprising:
- a first memory chip configured to become active in response to a chip enable signal;
- a second memory chip configured to become active in response to the chip enable signal and configured to share a data bus with the first memory chip;
- and
- a controller connected to the first memory chip and the second memory chip in common through the data bus and configured to transmit a first multichip select command and a second multichip select command through the data bus,
- wherein the first memory chip, in response to the first multichip select command, receives a first operation request transmitted by the controller through the data bus;
- and
- wherein the second memory chip, in response to the second multichip select command, receives a second operation request transmitted by the controller through the data bus before the first memory chip operates according to the first operation request.
A method of operating a memory system having a plurality of memory chips including a first memory chip and a second memory chip and a controller, the method comprising:
- allowing the plurality of memory chips to become active by transmitting a chip enable signal;
- transmitting a first multichip select command to the first memory chip from the controller;
- transmitting a first operation request to the first memory chip in response to the first multichip select command;
- transmitting a second multichip select command to the second memory chip from the controller;
- transmitting a second operation request to the second memory chip in response to the second multichip select command;
- transmitting an operation confirm signal to the first and second memory chips from the controller;
- and
- performing operations according to the first and second operation requests in response to the operation confirm signal.
A method of operating a semiconductor memory device, the method comprising:
- receiving a multichip select command;
- receiving an operation request in response to the multichip select command;
- receiving an operation confirm signal instructing to perform an operation according to the operation request;
- and
- performing the operation according to the operation request in response to the operation confirm signal.
Dependencies are inferred from the claim text.