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US 9,311,245 B2Granted
Dynamic cache sharing based on power state
AssigneeIntel Corporation
InventorsRyan D. Wells, Michael J. Muchnick, Chinnakrishnan S. Ballapuram
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Abstract
In one embodiment, the present invention includes a cache, compute engines connected to the cache, and a way mask disposed between the cache and the compute engines. This way mask may be partitioned into ways. Some of the ways may be dedicated to only one of the compute engines and other ways can be shared among more than one of the compute engines. Other embodiments are described and claimed.
Claims17
A system comprising:
- a cache;
- compute engines connected to said cache;
- cache allocation logic associated with a way mask disposed between said cache and said compute engines, said way mask partitioned into ways, wherein some ways are dedicated to only one of said compute engines and other ways are shared among more than one of said compute engines;
- a power control unit to monitor a power state of said compute engines and to update said way mask based on said power state of said compute engines.
1 more element
An apparatus comprising:
- a single die including a central processing unit (CPU) and a graphics processing unit (GPU), the single die further including a shared cache memory coupled to the CPU and the GPU, cache allocation logic associated with a way mask disposed between the shared cache memory and the CPU and the GPU, the way mask partitioned into ways, wherein some ways are dedicated to only one of the CPU and the GPU and other ways are shared among more than one of the CPU and the GPU, and a power control unit to monitor a power state of the CPU and the GPU and to update the way mask based on the power state of the CPU and the GPU.
A system comprising:
- a single die including a central processing unit (CPU) and a graphics processing unit (GPU), the single die further including a shared cache memory, compute engines connected to the shared cache memory, cache allocation logic associated with a way mask disposed between the shared cache memory and the compute engines, the way mask partitioned into ways, wherein some ways are dedicated to only one of the compute engines and other ways are shared among more than one of the compute engines, and a power control unit to monitor a power state of the compute engines and to update the way mask based on the power state of the compute engines, wherein the system is to send a cache request, monitor the power state, compare the power state to a first value, allocate the shared cache memory, fill the shared cache memory, update the power state, respectively, iteratively until a workload is completed.
Dependencies are inferred from the claim text.