Enforcing ordering of snoop transactions in an interconnect for an integrated circuit
AssigneeArm Limited
InventorsSean James Salisbury, Andrew David Tune, Daniel Sara
Life of this patent
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Abstract
An interconnect has transaction tracking circuitry for enforcing ordering of a set of data access transactions so that they are issued to slave devices in an order in which they are received from master devices. The transaction tracking circuitry is reused for also enforcing ordering of snoop transactions which are triggered by the set of data access transactions, for snooping master devices identified by a snoop filter as holding cache data for the target address of the transactions.
Claims19
An interconnect for connecting devices in an integrated circuit, the interconnect comprising:
- transaction tracking circuitry capable of tracking data access transactions received by the interconnect from one or more master devices, and for at least one set of data access transactions, controlling issuing of the data access transactions within the same set of data access transactions to one or more slave devices in a selected order;
- and
- a snoop filter capable of identifying, in response to a data access transaction specifying a target address, which master devices have cached data for the target address;
- wherein the transaction tracking circuitry is capable of controlling issuing of at least one snoop transaction to at least one master device identified by the snoop filter as having cached data for the target address;
- and
- for a set of snoop transactions issued in response to data access transactions within the same set of data access transactions, the transaction tracking circuitry is capable of controlling issuing of the set of snoop transactions to the at least one master device in an order corresponding to the selected order of the corresponding set of data access transactions.
An interconnect for connecting devices in an integrated circuit, the interconnect comprising:
- transaction tracking means for tracking data access transactions received by the interconnect from one or more master devices, and for at least one set of data access transactions, for controlling issuing of the data access transactions within the same set of data access transactions to one or more slave devices in a selected order;
- and
- snoop filter means for identifying, in response to a data access transaction specifying a target address, which master devices have cached data for the target address;
- wherein the transaction tracking means is capable of controlling issuing of at least one snoop transaction to at least one master device identified by the snoop filter means as having cached data for the target address;
- and
- for a set of snoop transactions issued in response to data access transactions within the same set of data access transactions, the transaction tracking means is capable of controlling issuing of the set of snoop transactions to the at least one master device in an order corresponding to the selected order of the corresponding set of data access transactions.
Transaction tracking circuitry for an interconnect for connecting one or more master devices and one or more slave devices in an integrated circuit, the transaction tracking circuitry comprising:
- a snoop filter interface capable of controlling a snoop filter, in response to a data access transaction received from a master device specifying a target address, to identify which master devices have cached data for the target address, and capable of controlling issuing of at least one snoop transaction to at least one master device identified by the snoop filter as having cached data for the target address;
- and
- control circuitry capable of controlling an order in which the data access transactions are issued to the one or more slave devices;
- wherein for at least one set of data access transactions, the control circuitry is capable of controlling issuing of the data access transactions within the same set of data access transactions to the one or more slave devices in a selected order;
- and
- for a set of snoop transactions issued in response to data access transactions within the same set of data access transactions, the control circuitry is capable of controlling issuing of the set of snoop transactions to the at least one master device in an order corresponding to the selected order of the corresponding set of data access transactions.
Transaction tracking circuitry for an interconnect for connecting one or more master devices and one or more slave devices in an integrated circuit, the transaction tracking circuitry comprising:
- snoop filter interface means for controlling a snoop filter, in response to a data access transaction received from a master device specifying a target address, to identify which master devices have cached data for the target address, and for controlling issuing of at least one snoop transaction to at least one master device identified by the snoop filter as having cached data for the target address;
- and
- control means for controlling an order in which the data access transactions are issued to the one or more slave devices;
- wherein for at least one set of data access transactions, the control means is capable of controlling issuing of the data access transactions within the same set of data access transactions to the one or more slave devices in a selected order;
- and
- for a set of snoop transactions issued in response to data access transactions within the same set of data access transactions, the control means is capable of controlling issuing of the set of snoop transactions to the at least one master device in an order corresponding to the selected order of the corresponding set of data access transactions.
A transaction tracking method for an interconnect in an integrated circuit, the method comprising:
- receiving data access transactions from one or more master devices of the integrated circuit;
- in response to a data access transaction specifying a target address, controlling a snoop filter to identify which master devices have cached data for the target address using a snoop filter;
- controlling issuing of at least one snoop transaction to at least one master device identified by the snoop filter as having cached data for the target address;
- and
- controlling issuing of the data access transactions to one or more slave devices;
- wherein for at least one set of data access transactions, transaction tracking circuitry controls issuing of the data access transactions within the same set of data access transactions to one or more slave devices in a selected order;
- and
- the same transaction tracking circuitry controls issuing of a set of snoop transactions issued in response to data access transactions within the same set of data access transactions so that the set of snoop transactions are issued to the at least one master device in an order corresponding to the selected order of the corresponding set of data access transactions.
Dependencies are inferred from the claim text.