Memory management
AssigneeHewlett Packard Enterprise Development LP
InventorsBallard C. Bare, Shaun K. Wakumoto
Life of this patent
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Abstract
Methods and devices are provided for memory management. One embodiment includes creating a memory control block including a number of sub-blocks, where the number of sub-blocks are capable of storing at least one data structure in a memory device. The method also includes scanning the control block for a free-able data structure having a defined data structure property, marking the free-able data structure as free-able in a bit map, and de-allocating the free-able data structure.
Claims20
A non-transitory computer readable medium on which are stored instructions that when executed by a device, cause the device to perform a memory management method, comprising:
- storing at least one data structure in a number of sub-blocks, where the number of sub-blocks are included in a control block;
- arranging the number of sub-blocks into a descending fullness order;
- scanning the control block for a free-able data structure having a defined data structure property;
- marking the free-able data structure as free-able in a bit map;
- and
- de-allocating the free-able data structure.
A method for memory management in a computing system having a memory device, comprising:
- scanning a control block for a free-able data structure, where the control block includes a number of sub-blocks capable of storing at least one data structure in the memory device;
- arranging the number of sub-blocks into a descending fullness order;
- creating a link list;
- adding the free-able data structure to the link list;
- and
- de-allocating the free-able data structure into a memory pool after the scan of the control block is completed.
A memory manager comprising a processing device coupled to a memory, the memory storing instructions that are to cause the processing device to:
- store a predetermined number of data structures in a number of sub-blocks, where the number of sub-blocks are included in a control block;
- arrange the number of sub-blocks into a descending fullness order;
- allocate memory in response to a request for a memory allocation from a requesting process;
- scan the control block for a free-able data structure;
- receive a de-allocate request for a first data structure, where the de-allocate request is received during the scan of the control block;
- mark the first data structure and the free-able data structure as free-able in a bit map;
- and
- scan the bit map and de-allocate the first data structure and the free-able data structure.
A non-transitory computer readable medium on which is stored instructions that when executed by a processor, cause the processor to:
- store at least one data structure in a number of sub-blocks, where the number of sub-blocks are included in a control block;
- scan the control block for a free-able data structure having a defined data structure property;
- mark the free-able data structure as free-able in a bit map;
- and
- de-allocate the free-able data structure from one of the sub-blocks, and wherein another data structure present and allocated in the one of the sub-blocks before the de-allocating remains present and allocated in the one of the sub-blocks after the de-allocating of the free-able data structure.
Dependencies are inferred from the claim text.