Mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor
AssigneeIntel Corporation
InventorsJiewen Yao, Vincent Zimmer
Life of this patent
Estimating the term…
Abstract
A mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor is disclosed. A method of the disclosure includes receiving, by a processing device, a system management interrupt (SMI) event. The method further includes invoking, in response to the SMI event, a privilege manager to execute from a read-only memory (ROM) entry point to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality.
Claims20
A method for supporting reliability, availability, and serviceability (RAS) flows in a peer monitor, comprising:
- receiving, by a processing device, a system management interrupt (SMI) event;
- and
- invoking, by the processing device in response to the SMI event, a privilege manager to execute from a read-only memory (ROM) entry point to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality,
- wherein the privilege manager is to execute an error check on read-access memory (RAM) subsequent to invocation.
An apparatus for supporting reliability, availability, and serviceability (RAS) flows in a peer monitor, comprising:
- a memory module comprising a privilege execution environment and a low privilege execution environment;
- and
- a processing device communicably coupled to the memory module, the processing device to:
- receive a system management interrupt (SMI) event;
- invoke, in response to the SMI event, a SMI transfer monitor (STM) to execute from a read-only memory (ROM) entry point to handle the SMI event;
- and
- provide, by the STM, support for memory hot plug functionality and processor hot plug functionality via a hot plug service module of the STM,
- wherein the STM to execute an error check on read-access memory (RAM) subsequent to invocation.
A non-transitory machine-readable storage medium including data that, when accessed by a processing device, cause the processing device to perform operations comprising:
- accessing, by a privilege manager executed by the processing device from a read-only memory (ROM) entry point, a transition data structure tracking an integrity of a read-access memory (RAM), the accessing in response to the processing device receiving a system management interrupt (SMI) event;
- executing, by the privilege manager based on the transition data structure, an error check on the RAM;
- and
- when the error check indicates no error in the RAM, passing, by the privilege manager, control to another version of the privilege manager executing in the RAM to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality.
Dependencies are inferred from the claim text.