US 9,311,138 B2Granted

System management interrupt handling for multi-core processors

AssigneeIntel Corporation

InventorsSarathy Jayakumar, Mohan J. Kumar, Michael D. Kinney

Life of this patent

Estimating the term…

Loading patent…

Abstract

Technologies for system management interrupt (“SMI”) handling include a number of processor cores configured to enter a system management mode (“SMM”) in response to detecting an SMI. The first processor core to enter SMM and acquire a master thread lock sets an in-progress flag and executes a master SMI handler without waiting for other processor cores to enter SMM. Other processor cores execute a subordinate SMI handler. The master SMI handler may direct the subordinate SMI handlers to handle core-specific SMIs. The multi-core processor may set an SMI service pending flag in response to detecting the SMI, which is cleared by the processor core that acquires the master thread lock. A processor core entering SMM may immediately resume normal execution upon determining the in-progress flag is not set and the service pending flag is not set, to detect and mitigate spurious SMIs. Other embodiments are described and claimed.

Claims17

Dependent claims

A multi-core processor to handle a system management interrupt generated in a computing device, the multi-core processor comprising:

a system management interrupt service pending flag, wherein the multi-core processor is to set the system management interrupt service pending flag in response to detection of the system management interrupt;
a processor core to (i) enter a system management mode in response to the detection of the system management interrupt by the multi-core processor and (ii) execute a system management interrupt handler manager in response to entrance of the system management mode, the system management interrupt handler manager to:
determine whether an in-progress flag is set, the in-progress flag to indicate another processor core of the multi-core processor has acquired a master thread lock of the computing device;
attempt to acquire the master thread lock in response to a determination that the in-progress flag is not set;
set the in-progress flag in response to acquisition of the master thread lock;
execute a master system management interrupt handler in response to the acquisition of the master thread lock;
determine whether the system management interrupt service pending flag is set in response to the determination that the in-progress flag is not set;
resume an execution mode of the processor core in response to a determination that the system management interrupt service pending flag is not set,
attempt to acquire the master thread lock in response to a determination that the system management interrupt service pending flag is set, and
clear the system management interrupt service pending flag in response to the acquisition of the master thread lock and prior to execution of the master system management interrupt handler.

7 more elements

A method for handling a system management interrupt generated in a computing device, the method comprising:

entering, by a processor core of the computing device, a system management mode of the processor core in response to detecting the system management interrupt;
determining, by the processor core, whether an in-progress flag is set, the in-progress flag to indicate another processor core of the computing device has acquired a master thread lock of the computing device;
attempting, by the processor core, to acquire the master thread lock in response to determining the in-progress flag is not set;
setting, by the processor core, the in-progress flag in response to acquiring the master thread lock;
and
executing, by the processor core, a master system management interrupt handler in response to acquiring the master thread lock;
determining, by the processor core, whether a system management interrupt service pending flag of the computing device is set in response to determining the in-progress flag is not set, wherein the system management interrupt service pending flag is to be set by a processor of the computing device in response to detecting the system management interrupt;
resuming, by the processor core, an execution mode of the processor core in response to determining the system management interrupt service pending flag is not set;
and
clearing, by the processor core, the system management interrupt service pending flag in response to acquiring the master thread lock and prior to executing the master system management interrupt handler;
wherein attempting to acquire the master thread lock further comprises attempting to acquire the master thread lock in response to determining the system management interrupt service pending flag is set.

8 more elements

One or more non-transitory, machine readable storage media comprising a plurality of instructions that in response to being executed cause a computing device to:

enter, by a processor core of the computing device, a system management mode of the processor core in response to detecting the system management interrupt;
determine, by the processor core, whether an in-progress flag is set, the in-progress flag to indicate another processor core of the computing device has acquired a master thread lock of the computing device;
attempt, by the processor core, to acquire the master thread lock in response to determining the in-progress flag is not set;
set, by the processor core, the in-progress flag in response to acquiring the master thread lock;
execute, by the processor core, a master system management interrupt handler in response to acquiring the master thread lock;
determine, by the processor core, whether a system management interrupt service pending flag of the computing device is set in response to determining the in-progress flag is not set, wherein the system management interrupt service pending flag is to be set by a processor of the computing device in response to detecting the system management interrupt;
resume, by the processor core, an execution mode of the processor core in response to determining the system management interrupt service pending flag is not set;
and
clear, by the processor core, the system management interrupt service pending flag in response to acquiring the master thread lock and prior to executing the master system management interrupt handler;
wherein to attempt to acquire the master thread lock further comprises to attempt to acquire the master thread lock in response to determining the system management interrupt service pending flag is set.

7 more elements

Dependencies are inferred from the claim text.