Elastic buffer module and elastic buffering method for transmission interface
AssigneePhison Electronics Corp.
InventorChih-Ming Chen
Life of this patent
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Abstract
An elastic buffer module including a memory unit, a write control module, and a read control module is provided. The memory unit receives, stores, and outputs a data sequence from a transmitting side. The write control module removes at least part of auxiliary data from the data sequence and writes the data sequence that has the auxiliary data removed into the memory unit. The read control module reads the data sequence from the memory unit and adds auxiliary data to the data sequence to adjust a write state of the transmitting side and a read state of a receiving side. Additionally, an elastic buffering method of a transmission interface is also provided.
Claims25
An elastic buffer module, comprising:
- a memory unit, disposed between a transmitting side and a receiving side, wherein a data sequence is written to the memory unit and the data sequence is received from the transmitting side, stored in the memory unit and outputted by the memory unit in a single read or write process;
- a write control module, coupled to the memory unit, disposed at the transmitting side, and configured to remove at least a part of auxiliary data from the data sequence, and writing the data sequence that has the auxiliary data removed into the memory unit in the signal read or write process;
- and
- a read control module, coupled to the memory unit and disposed at the receiving side, configured to read the data sequence from the memory unit according to a First-In-First-Out rule, and add auxiliary data to the data sequence in the signal read or write process.
An elastic buffering method of a transmission interface, wherein the transmission interface is configured to transmit a data sequence from a transmitting side to a receiving side in a single read or write process, the elastic buffering method comprising:
- receiving the data sequence from the transmitting side in the single read or write process;
- removing at least a part of auxiliary data from the data sequence, and writing the data sequence that has the auxiliary data removed into a memory unit in the single read or write process;
- reading the data sequence from the memory unit according to a First-In-First-Out rule in the single read or write process;
- and
- adding auxiliary data to the read data sequence in the single read or write process,
- wherein the data sequence is received from the transmitting side, stored in the memory unit, and outputted by the memory unit in the single read or write process.
Dependencies are inferred from the claim text.