US 9,311,011 B2 · Dynamic address negotiation for shared memory regions in heterogenous multiprocessor systems

Abstract

Mobile computing devices may be configured to compile and execute portions of a general purpose software application in an auxiliary processor (e.g., a DSP) of a multiprocessor system by reading and writing information to a shared memory. A first process (P1) on the applications processor may request address negotiation with a second process (P2) on the auxiliary processor, obtain a first address map from a first operating system, and send the first address map to the auxiliary processor. The second process (P2) may receive the first address map, obtain a second address map from a second operating system, identify matching addresses in the first and second address maps, store the matching addresses as common virtual addresses, and send the common virtual addresses back to the applications processor. The first and second processes (i.e., P1 and P2) may each use the common virtual addresses to map physical pages to the memory.

Claims14

Dependent claims

A method of providing access to a shared memory region of a multiprocessor computing device having a first processing core and a second processing core, the method comprising:

requesting, by a first process in the first processing core, address negotiation with a second process in the second processing core;
obtaining a first address map of the first process in the first processing core in response to requesting address negotiation with the second process in the second processing core;
sending the first address map to the second processing core so as to cause the second processing core to obtain a second address map of the second process in the second processing core;
receiving a common virtual address in the first processing core in response to sending the first address map to the second processing core, the received common virtual address including an address included in both the first address map of the first process and the second address map of the second process;
storing the received common virtual address as a first attribute of the shared memory region inside a first operating system kernel of the first processing core;
and
mapping the shared memory region at the received common virtual address of the first process.

4 more elements

A multiprocessor computing device, comprising:

means for requesting by a first process in a first processing core address negotiation with a second process in a second processing core;
means for obtaining a first address map of the first process in the first processing core in response to requesting address negotiation with the second process in the second processing core;
means for sending the first address map to the second processing core so as to cause the second processing core to obtain a second address map of the second process in the second processing core;
means for receiving a common virtual address in the first processing core in response to sending the first address map to the second processing core, the received common virtual address including an address included in both the first address map of the first process and the second address map of the second process;
means for storing the received common virtual address as a first attribute of a shared memory region inside a first operating system kernel of the first processing core;
and
means for mapping the shared memory region at the received common virtual address of the first process.

4 more elements

A multiprocessor computing device, comprising:

a first processing core;
a second processing core;
and
a shared memory region coupled to the first and second processing cores, wherein the first processing core is configured with processor-executable instructions to perform operations comprising:
requesting by a first process address negotiation with a second process in the second processing core;
obtaining a first address map of the first process in response to requesting address negotiation with the second process in the second processing core;
sending the first address map to the second processing core so as to cause the second processing core to obtain a second address map of the second process in the second processing core;
receiving a common virtual address in response to sending the first address map to the second processing core, the received common virtual address including an address included in both the first address map of the first process and the second address map of the second process;
storing the received common virtual address as a first attribute of the shared memory region inside a first operating system kernel;
and
mapping the shared memory region at the received common virtual address of the first process.

8 more elements

A non-transitory computer readable storage medium having stored thereon processor-executable software instructions configured to cause a first processing core of a multiprocessor computing device to perform operations comprising:

requesting by a first process address negotiation with a second process in a second processing core of the multiprocessor computing device;
obtaining a first address map of the first process in response to requesting address negotiation with the second process in the second processing core;
sending the first address map to the second processing core so as to cause the second processing core to obtain a second address map of the second process in the second processing core;
receiving a common virtual address in response to sending the first address map to the second processing core, the received common virtual address including an address included in both the first address map of the first process and the second address map of the second process;
storing the received common virtual address as a first attribute of a shared memory region inside a first operating system kernel;
and
mapping the shared memory region at the received common virtual address of the first process.

4 more elements

Dependencies are inferred from the claim text.

Dynamic address negotiation for shared memory regions in heterogenous multiprocessor systems

Life of this patent

Dynamic address negotiation for shared memory regions in heterogenous multiprocessor systems

Life of this patent

Abstract

Claims14