Memory storage device, memory control circuit unit and power supply method
AssigneePhison Electronics Corp.
InventorsChih-Jen Hsu, Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen
Life of this patent
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Abstract
A memory storage device, a memory control circuit unit and a power supply method are provided. The power supply method includes: providing a first power voltage to a host interface circuit of the memory storage device; providing a second power voltage to a memory management circuit of the memory storage device; providing a third power voltage to a memory interface circuit of the memory storage device, wherein a reference voltage terminal of the memory interface circuit is coupled to a power input terminal of the memory management circuit. Thus, the overheat problem of the memory storage device due to the voltage conversion may be improved.
Claims22
A memory storage device, comprising:
- a connection interface unit configured to couple to a host system;
- a rewritable non-volatile memory module comprising a plurality of physical erasing units;
- and
- a memory control circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module, and the memory control circuit unit comprising:
- a host interface circuit configured to couple to the host system;
- a memory management circuit;
- a memory interface circuit configured to couple to the rewritable non-volatile memory module;
- and
- a power supply module coupled to the host interface circuit, the memory management circuit and the memory interface circuit,
- wherein the power supply module is configured to provide a first power voltage to a power input terminal of the host interface circuit,
- the power supply module is further configured to provide a second power voltage to a power input terminal of the memory management circuit, and
- the power supply module is further configured to provide a third power voltage to a power input terminal of the memory interface circuit,
- wherein a reference voltage terminal of the memory interface circuit is coupled to the power input terminal of the memory management circuit, and voltage values of the first power voltage, the second power voltage and the third power voltage are different from one another.
A memory control circuit unit configured to control a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erasing units, and the memory control circuit unit comprises:
- a host interface circuit configured to couple to a host system;
- a memory management circuit;
- a memory interface circuit configured to couple to the rewritable non-volatile memory module;
- and
- a power supply module coupled to the host interface circuit, the memory management circuit and the memory interface circuit,
- wherein the power supply module is configured to provide a first power voltage to a power input terminal of the host interface circuit,
- the power supply module is further configured to provide a second power voltage to a power input terminal of the memory management circuit, and
- the power supply module is further configured to provide a third power voltage to a power input terminal of the memory interface circuit,
- wherein a reference voltage terminal of the memory interface circuit is coupled to the power input terminal of the memory management circuit, and voltage values of the first power voltage, the second power voltage and the third power voltage are different from one another.
A power supply method for a memory storage device comprising a rewritable non-volatile memory module having a plurality of physical erasing units, and the power supply method comprising:
- providing a first power voltage to a power input terminal of a host interface circuit of the memory storage device;
- providing a second power voltage to a power input terminal of a memory management circuit of the memory storage device;
- and
- providing a third power voltage to a power input terminal of a memory interface circuit of the memory storage device,
- wherein a reference voltage terminal of the memory interface circuit is coupled to the power input terminal of the memory management circuit, and voltage values of the first power voltage, the second power voltage and the third power voltage are different from one another.
Dependencies are inferred from the claim text.