Static offset reduction in a current conveyor
AssigneeDialog Semiconductor GmbH
InventorSlawomir Malinowski
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AssigneeDialog Semiconductor GmbH
InventorSlawomir Malinowski
Estimating the term…
The present document relates to voltage mirror circuits. A voltage mirror circuit, having an input node and an output node is configured to provide substantially equal voltage levels at the input node and the output node. The voltage mirror circuit comprises an input current source transistor, an input gain transistor arranged in series with the input current source transistor such that the input gain transistor is traversed by the bias current, wherein the voltage level at the input node corresponds to the voltage drop across the input current source transistor and the input gain transistor. An intermediate gain transistor forms a first current mirror with the input gain transistor. An output current source transistor forms a second current mirror with the intermediate current source transistor. An output gain transistor is wherein the voltage level at the output node corresponds to the voltage drop across the output current source transistor and the output gain transistor.
A current sensing circuit configured to provide an indication of a load current provided to a load, the current sensing circuit comprising:
A method for providing an indication of a load current provided to a load, the method comprising:
Dependencies are inferred from the claim text.